Design and analysis of Gate all around Tunnel FET In 10nm Technology

Abstract

By using TCAD simulation method, we have developed GaAs/InN heterostructure-based nanowire gate-all-around (GAA) negative capacitance (NC) tunnel field-effect transistor (TFET). The proposed GAA-TFET eliminates the thermionic restriction (60 mV/decade) on the subthreshold swing (SS) of traditional MOSFETs by improved electrostatic control and quantum mechanical tunnelling. In addition, by taking use of gate voltage differential amplification when specific circumstances, An NC state ferroelectric materials enhances TFET performance. The very high ION /IOFF The most surprising results of this gadget include a ratio of 1011 and a huge on-state current of 135 A, which beats all prior results. When the NC effect is incorporated into a low ss and high voltage. The output characteristics also showed considerable drain induced by barrier lowering (DIBL) of 9.7 mV, huge transconductance (gm) of 7.87 mS (103 orders greater than the baseline TFET), and 0.53 V as the threshold voltage (37.65% less than the baseline TFET). Thus, all the findings suggest that the suggested device shape might open up new opportunities for electrical.