“Design and Implementation of High-Speed Vedic Multiplier Architectures Using Optimized Adder Topologies for Efficient VLSI Systems”. International Journal of Food and Nutritional Sciences 11, no. 11 (January 1, 2022): 2413–2421. Accessed August 25, 2026. http://www.ijfans.org/index.php/Journal/article/view/12736.